                              x86 Opcode List (con't)
                                  By: Cyclone
                                    - TI#1 -

[Disclaimer]
                I tried to get this to a state with as few errors as
		humanly possible.  I might have missed one or two as my main
		source of information was full of errors.  I take no
		responsibility for whatever a person does with this or any
		other piece of information - That's their problem.

[Note]          I could only find info up to the 80386.  When I get a
		more complete list I will update the info.

So, here are the opcodes:

-AAA-------ASCII Adjust after Addition
-----------------
|0|0|1|1|0|1|1|1|
-----------------

-AAD-------ASCII Adjust before Division
-----------------  -----------------
|1|1|0|1|0|1|0|1|  |0|0|0|0|1|0|1|0|
-----------------  -----------------

-AAM-------ASCII Adjust after Multiplication
-----------------  -----------------
|1|1|0|1|0|1|0|0|  |0|0|0|0|1|0|1|0|
-----------------  -----------------

-AAS-------ASCII Adjust after Subtraction
-----------------
|0|0|1|1|1|1|1|1|
-----------------

-ADC-------Add with Carry
		-----------------  -----------------
Register/Memory |0|0|0|1|0|0|d|w|  |mod| reg | R/M |
		-----------------  -----------------
Immediate to    -----------------  -----------------
Register/Memory |1|0|0|0|0|0|s|w|  |mod|0|1|0| R/M |  -Data-
		-----------------  -----------------
Immediate to    -----------------
AL/AX/EAX Reg.  |0|0|0|1|0|1|0|w|  -Data-
		-----------------

-ADD-------Integer Add
		-----------------  -----------------
Register/Memory |0|0|0|0|0|0|d|w|  |mod| reg | R/M |
		-----------------  -----------------
Immediate to    -----------------  -----------------
Register/Memory |1|0|0|0|0|0|s|w|  |mod|0|0|0| R/M |  -Data-
		-----------------  -----------------
Immediate to    -----------------
AL/AX/EAX Reg.  |0|0|0|0|0|1|0|w|  -Data-
		-----------------

-AND-------Logical AND
		-----------------  -----------------
Register/Memory |0|0|1|0|0|0|d|w|  |mod| reg | R/M |
		-----------------  -----------------
Immediate to    -----------------  -----------------
Register/Memory |1|0|0|0|0|0|s|w|  |mod|1|0|0| R/M |  -Data-
		-----------------  -----------------
Immediate to    -----------------
AL/AX/EAX Reg.  |0|0|1|0|0|1|0|w|  -Data-
		-----------------

-ARPL------Adjust RPL field of selector
-----------------  -----------------
|0|1|1|0|0|0|1|1|  |mod| Reg | R/M |
-----------------  -----------------

-BOUND-----Check Array Index Against Bounds
Available: 186+
-----------------  -----------------
|0|1|1|0|0|0|1|0|  |mod| Reg | R/M |
-----------------  -----------------

-BSF-------Bit Scan Forward
Available: 386+
-----------------  -----------------  -----------------
|0|0|0|0|1|1|1|1|  |1|0|1|1|1|1|0|0|  |mod| Reg | R/M |
-----------------  -----------------  -----------------

-BSR-------Bit Scan Reverse
Available: 386+
-----------------  -----------------  -----------------
|0|0|0|0|1|1|1|1|  |1|0|1|1|1|1|0|1|  |mod| Reg | R/M |
-----------------  -----------------  -----------------

-BT--------Bit Test
Available: 386+
		-----------------  -----------------  -----------------
R/M, # -        |0|0|0|0|1|1|1|1|  |1|0|1|1|1|0|1|0|  |mod|1|0|0| R/M |  8-bit#
		-----------------  -----------------  -----------------
		-----------------  -----------------  -----------------
R/M, R -        |0|0|0|0|1|1|1|1|  |1|0|1|0|0|0|1|1|  |mod| Reg | R/M |
		-----------------  -----------------  -----------------

-BTC-------Bit Test, then Complement bit
Available: 386+
		-----------------  -----------------  -----------------
R/M, # -        |0|0|0|0|1|1|1|1|  |1|0|1|1|1|0|1|0|  |mod|1|1|1| R/M |  8-bit#
		-----------------  -----------------  -----------------
		-----------------  -----------------  -----------------
R/M, R -        |0|0|0|0|1|1|1|1|  |1|0|1|1|1|0|1|1|  |mod| Reg | R/M |
		-----------------  -----------------  -----------------

-BTR-------Bit Test, then Reset bit
Available: 386+
		-----------------  -----------------  -----------------
R/M, # -        |0|0|0|0|1|1|1|1|  |1|0|1|1|1|0|1|0|  |mod|1|1|0| R/M |  8-bit#
		-----------------  -----------------  -----------------
		-----------------  -----------------  -----------------
R/M, R -        |0|0|0|0|1|1|1|1|  |1|0|1|1|0|0|1|1|  |mod| Reg | R/M |
		-----------------  -----------------  -----------------

-BTS-------Bit Test, then Set bit
Available: 386+
		-----------------  -----------------  -----------------
R/M, # -        |0|0|0|0|1|1|1|1|  |1|0|1|1|1|0|1|0|  |mod|1|0|1| R/M |  8-bit#
		-----------------  -----------------  -----------------
		-----------------  -----------------  -----------------
R/M, R -        |0|0|0|0|1|1|1|1|  |1|0|1|0|1|0|1|1|  |mod| Reg | R/M |
		-----------------  -----------------  -----------------

-CALL------Call procedure
		-----------------
Near,Direct     |1|1|1|0|1|0|0|0|  16-bit displacement
		-----------------
		-----------------  -----------------
Near,Indirect   |1|1|1|1|1|1|1|1|  |mod|0|1|0| R/M |
		-----------------  -----------------
		-----------------
Far,Direct      |1|0|0|1|1|0|1|0|  Absolute Offset, Segment
		-----------------
		-----------------  -----------------
Far,Indirect    |1|1|1|1|1|1|1|1|  |mod|0|1|1| R/M |
		-----------------  -----------------

-CBW/CWDE--Convert Byte to Word / Convert Word to Doubleword
-----------------
|1|0|0|1|1|0|0|0|
-----------------

-CLC-------Clear Carry flag
-----------------
|1|1|1|1|1|0|0|0|
-----------------

-CLD-------Clear Direction flag
-----------------
|1|1|1|1|1|1|0|0|
-----------------

-CLI-------Clear Interrupt flag (disable Interrupts)
-----------------
|1|1|1|1|1|0|1|0|
-----------------

-CLTS------Clear Task-Switched flag in CR0
Available: 386+ (L0 protected)
-----------------  -----------------
|0|0|0|0|1|1|1|1|  |0|0|0|0|0|1|1|0|
-----------------  -----------------

-CMC-------Complement Carry flag
-----------------
|1|1|1|1|0|1|0|1|
-----------------

-CMP-------Compare
		-----------------  -----------------
Register/Memory |0|0|1|1|1|0|d|w|  |mod| reg | R/M |
		-----------------  -----------------
Immediate to    -----------------  -----------------
Register/Memory |1|0|0|0|0|0|s|w|  |mod|1|1|1| R/M |  -Data-
		-----------------  -----------------
Immediate to    -----------------
AL/AX/EAX Reg.  |0|0|1|1|1|1|0|w|  -Data-
		-----------------

-CMPS_-----Compare String data (CMPSB, CMPSW, CMPSD)
-----------------
|1|0|1|0|0|1|1|w|
-----------------

-CWD/CDQ---Convert Word to Doubleword/Convert Doubleword to Quadword
-----------------
|1|0|0|1|1|0|0|1|
-----------------

-DAA-------Decimal Adjust after Addition
-----------------
|0|0|1|0|0|1|1|1|
-----------------

-DAS-------Decimal Adjust after Subtraction
-----------------
|0|0|1|0|1|1|1|1|
-----------------

-DEC-------Decrement
		-----------------  -----------------
Register/Memory |1|1|1|1|1|1|1|w|  |mod|0|0|1| R/M |
		-----------------  -----------------
		-----------------
Register        |0|1|0|0|1| Reg |
		-----------------

-DIV-------Unsigned Divide
-----------------  -----------------
|1|1|1|1|0|1|1|w|  |mod|1|1|0| R/M |
-----------------  -----------------

-ENTER-----Make Stack Frame For Procedure Parameters
-----------------
|1|1|0|0|1|0|0|0|  16-bit displacement, 8-bit level
-----------------

-HLT-------Halt until interrupt
-----------------
|1|1|1|1|0|1|0|0|
-----------------

-IDIV------Integer (signed) Divide
-----------------  -----------------
|1|1|1|1|0|1|1|w|  |mod|1|1|1| R/M |
-----------------  -----------------

-IMUL------Integer (signed) Multiply
		-----------------  -----------------  -----------------
R, R/M -        |0|0|0|0|1|1|1|1|  |1|0|1|0|1|1|1|1|  |mod| reg | R/M |
		-----------------  -----------------  -----------------
AL/AX/EAX,      -----------------  -----------------
Reg/Mem -       |1|1|1|1|0|1|1|w|  |mod|1|0|1| R/M |
		-----------------  -----------------
		-----------------  -----------------
R/M, # -        |0|1|1|0|1|0|s|1|  |mod| reg | R/M |  -data-
		-----------------  -----------------

-IN--------Input from IO port
		-----------------
from Immediate- |1|1|1|0|0|1|0|w|  8-bit Port Num.
		-----------------
		-----------------
from DX-        |1|1|1|0|1|1|0|w|
		-----------------

-INC-------Increment
		-----------------  -----------------
Register/Memory |1|1|1|1|1|1|1|w|  |mod|0|0|0| R/M |
		-----------------  -----------------
		-----------------
Register        |0|1|0|0|0| Reg |
		-----------------

-INS_------Input String data (INSB, INSW, INSD)
-----------------
|0|1|1|0|1|1|0|w|
-----------------

-INT 3-----Interrupt 3 (Breakpoint)
-----------------
|1|1|0|0|1|1|0|0|
-----------------

-INTO------Interrupt 4 if Overflow
-----------------
|1|1|0|0|1|1|1|0|
-----------------

-INT-------Interrupt
-----------------
|1|1|0|0|1|1|0|1|  8-bit Interrupt #
-----------------

-IRET------Return from Interrupt (also IRETD)
-----------------
|1|1|0|0|1|1|1|1|
-----------------

-J__-------Conditional Jump
		-----------------
8-Bit Displ. -  |0|1|1|1| cond. |  8-bit Displacement
		-----------------
		-----------------  -----------------
Full Displ. -   |0|0|0|0|1|1|1|1|  |1|0|0|0| cond. |  Full displacement
		-----------------  -----------------

-JCXZ------Jump if CX = 0  (also JECXZ)
-----------------
|1|1|1|0|0|0|1|1|  8-bit Displacement
-----------------

-JMP-------Jump
		-----------------
Near,8-bit      |1|1|1|0|1|0|1|1|  8-bit Displacement
		-----------------
		-----------------
Near,Direct     |1|1|1|0|1|0|0|1|  Full Displacement
		-----------------
		-----------------  -----------------
Near,Indirect   |1|1|1|1|1|1|1|1|  |mod|1|0|0| R/M |
		-----------------  -----------------
		-----------------
Far,Direct      |1|1|1|0|1|0|1|0|  Absolute Offset, Segment
		-----------------
		-----------------  -----------------
Far,Indirect    |1|1|1|1|1|1|1|1|  |mod|1|0|1| R/M |
		-----------------  -----------------

-LAHF------Load AH from flags
-----------------
|1|0|0|1|1|1|1|1|
-----------------

-LAR-------Load Access Rights
-----------------  -----------------  -----------------
|0|0|0|0|1|1|1|1|  |0|0|0|0|0|0|1|0|  |mod| reg | R/M |
-----------------  -----------------  -----------------

-LEA-------Load Effective Address
-----------------  -----------------
|1|0|0|0|1|1|0|1|  |mod| reg | R/M |
-----------------  -----------------

-LEAVE-----High Level Procedure Exit
-----------------
|1|1|0|0|1|0|0|1|
-----------------

-LGDT------Load Global Descriptor Table Register
-----------------  -----------------  -----------------
|0|0|0|0|1|1|1|1|  |0|0|0|0|0|0|0|1|  |mod|0|1|0| R/M |
-----------------  -----------------  -----------------

-LIDT------Load Interrupt Descriptor Table Register
-----------------  -----------------  -----------------
|0|0|0|0|1|1|1|1|  |0|0|0|0|0|0|0|1|  |mod|0|1|1| R/M |
-----------------  -----------------  -----------------

-LDS-------Load DS
-----------------  -----------------
|1|1|0|0|0|1|0|1|  |mod| reg | R/M |
-----------------  -----------------

-LES-------Load ES
-----------------  -----------------
|1|1|0|0|0|1|0|0|  |mod| reg | R/M |
-----------------  -----------------

-LFS-------Load FS
-----------------  -----------------  -----------------
|0|0|0|0|1|1|1|1|  |1|0|1|1|0|1|0|0|  |mod| reg | R/M |
-----------------  -----------------  -----------------

-LGS-------Load GS
-----------------  -----------------  -----------------
|0|0|0|0|1|1|1|1|  |1|0|1|1|0|1|0|1|  |mod| reg | R/M |
-----------------  -----------------  -----------------

-LSS-------Load SS
-----------------  -----------------  -----------------
|0|0|0|0|1|1|1|1|  |1|0|1|1|0|0|1|0|  |mod| reg | R/M |
-----------------  -----------------  -----------------

-LLDT------Load Local Descriptor Table Register
-----------------  -----------------  -----------------
|0|0|0|0|1|1|1|1|  |0|0|0|0|0|0|0|0|  |mod|0|1|0| R/M |
-----------------  -----------------  -----------------

-LMSW------Load Machine Status Word Register
-----------------  -----------------  -----------------
|0|0|0|0|1|1|1|1|  |0|0|0|0|0|0|0|1|  |mod|1|1|0| R/M |
-----------------  -----------------  -----------------

-LODS_-----Load String Data (LODSB, LODSW, LODSD)
-----------------
|1|0|1|0|1|1|0|w|
-----------------

-LOOP------Loop
-----------------
|1|1|1|0|0|0|1|0|  8-bit displacement
-----------------

-LOOPE-----Loop while Equal/Zero (LOOPZ)
-----------------
|1|1|1|0|0|0|0|1|  8-bit displacement
-----------------

-LOOPNE----Loop while Not Equal/Zero (LOOPNZ)
-----------------
|1|1|1|0|0|0|0|0|  8-bit displacement
-----------------

-LSL-------Load Segment Limit into register
-----------------  -----------------  -----------------
|0|0|0|0|1|1|1|1|  |0|0|0|0|0|0|1|1|  |mod| reg | R/M |
-----------------  -----------------  -----------------

-LTR-------Load Task Register
-----------------  -----------------  -----------------
|0|0|0|0|1|1|1|1|  |0|0|0|0|0|0|0|0|  |mod|0|1|1| R/M |
-----------------  -----------------  -----------------

-MOV-------Move
		-----------------  -----------------
R, R/M -        |1|0|0|0|1|0|d|w|  |mod| reg | R/M |
		-----------------  -----------------
AL/AX/EAX,      -----------------
Memory -        |1|0|1|0|0|0|d|w|  Full Displacement
		-----------------
		-----------------  -----------------
R/M, # -        |1|1|0|0|0|1|1|w|  |mod|0|0|0| R/M |  -Data-
		-----------------  -----------------
Register,       -----------------
Immediate -     |1|0|1|1|w| Reg |  -data-
		-----------------
		-----------------  -----------------
Segment, Reg -  |1|0|0|0|1|1|d|0|  |mod| sreg| R/M |
		-----------------  -----------------
System(CR_),    -----------------  -----------------  -----------------
register -      |0|0|0|0|1|1|1|1|  |0|0|1|0|0|0|d|0|  |1|1|CRreg| Reg |
		-----------------  -----------------  -----------------
System(DR_),    -----------------  -----------------  -----------------
register -      |0|0|0|0|1|1|1|1|  |0|0|1|0|0|0|d|1|  |1|1|DRreg| Reg |
		-----------------  -----------------  -----------------
System(TR_),    -----------------  -----------------  -----------------
register -      |0|0|0|0|1|1|1|1|  |0|0|1|0|0|1|d|0|  |1|1|TRreg| Reg |
		-----------------  -----------------  -----------------

		Value   CRreg   DRreg   TRreg
		000     CR0     DR0
		001             DR1
		010     CR2     DR2
		011     CR3     DR3
		100
		101
		110             DR6     TR6
		111             DR7     TR7

-MOVS_-----Move String data (MOVSB, MOVSW, MOVSD)
-----------------
|1|0|1|0|0|1|0|w|
-----------------

-MOVSX-----Move Sign-Extended
-----------------  -----------------  -----------------
|0|0|0|0|1|1|1|1|  |1|0|1|1|1|1|1|w|  |mod| reg | R/M |
-----------------  -----------------  -----------------

-MOVZX-----Move Zero-Extended
-----------------  -----------------  -----------------
|0|0|0|0|1|1|1|1|  |1|0|1|1|0|1|1|w|  |mod| reg | R/M |
-----------------  -----------------  -----------------

-MUL-------Multiply (unsigned)
-----------------  -----------------
|1|1|1|1|0|1|1|w|  |mod|1|0|0| R/M |
-----------------  -----------------

-NEG-------Negate
-----------------  -----------------
|1|1|1|1|0|1|1|w|  |mod|0|1|1| R/M |
-----------------  -----------------

-NOP-------No Operation
-----------------
|1|0|0|1|0|0|0|0|
-----------------

-NOT-------Logical Not
-----------------  -----------------
|1|1|1|1|0|1|1|w|  |mod|0|1|0| R/M |
-----------------  -----------------

-OR--------Logical OR
		-----------------  -----------------
Register/Memory |0|0|0|0|1|0|d|w|  |mod| reg | R/M |
		-----------------  -----------------
Immediate to    -----------------  -----------------
Register/Memory |1|0|0|0|0|0|s|w|  |mod|0|0|1| R/M |  -Data-
		-----------------  -----------------
Immediate to    -----------------
AL/AX/EAX Reg.  |0|0|0|0|1|1|0|w|  -Data-
		-----------------

-OUT-------Output to IO port
		-----------------
To Immediate-   |1|1|1|0|0|1|1|w|  8-bit Port Num.
		-----------------
		-----------------
To DX-          |1|1|1|0|1|1|1|w|
		-----------------

-OUTS_-----Output String data (OUTSB, OUTSW, OUTSD)
-----------------
|0|1|1|0|1|1|1|w|
-----------------

-POP-------Pop off stack
		-----------------
Register -      |0|1|0|1|1| reg |
		-----------------
		-----------------  -----------------
R/M -           |1|0|0|0|1|1|1|1|  |mod|0|0|0| R/M |
		-----------------  -----------------
		-----------------
Seg. Reg -      |0|0|0|srg|1|1|1|               // Pop CS invalid above 8086
		-----------------
		-----------------  -----------------
Seg. Reg -      |0|0|0|0|1|1|1|1|  |1|0|1|xrg|0|0|1|
		-----------------  -----------------

-POPA------Pop All Registers (also POPAD)
-----------------
|0|1|1|0|0|0|0|1|
-----------------

-POPF------Pop Flag Registers (also POPFD)
-----------------
|1|0|0|1|1|1|0|1|
-----------------

-PUSH------Push to stack
		-----------------
Register -      |0|1|0|1|0| reg |
		-----------------
		-----------------  -----------------
R/M -           |1|1|1|1|1|1|1|1|  |mod|1|1|0| R/M |
		-----------------  -----------------
		-----------------
Seg. Reg -      |0|0|0|srg|1|1|0|
		-----------------
		-----------------  -----------------
Seg. Reg -      |0|0|0|0|1|1|1|1|  |1|0|1|xrg|0|0|0|
		-----------------  -----------------
		-----------------
Immediate -     |0|1|1|0|1|0|s|0|  -Data-
		-----------------

-PUSHA-----Push All Registers (also PUSHAD)
-----------------
|0|1|1|0|0|0|0|0|
-----------------

-PUSHF-----Push Flag Registers (also PUSHFD)
-----------------
|1|0|0|1|1|1|0|0|
-----------------

-RCL-------Rotate through Carry Left
		-----------------  -----------------
R/M by 1 -      |1|1|0|1|0|0|0|w|  |mod|0|1|0| R/M |
		-----------------  -----------------
		-----------------  -----------------
R/M by CL -     |1|1|0|1|0|0|1|w|  |mod|0|1|0| R/M |
		-----------------  -----------------
		-----------------  -----------------
R/M by # -      |1|1|0|0|0|0|0|w|  |mod|0|1|0| R/M |  8-Bit number
		-----------------  -----------------

-RCR-------Rotate through Carry Right
		-----------------  -----------------
R/M by 1 -      |1|1|0|1|0|0|0|w|  |mod|0|1|1| R/M |
		-----------------  -----------------
		-----------------  -----------------
R/M by CL -     |1|1|0|1|0|0|1|w|  |mod|0|1|1| R/M |
		-----------------  -----------------
		-----------------  -----------------
R/M by # -      |1|1|0|0|0|0|0|w|  |mod|0|1|1| R/M |  8-Bit number
		-----------------  -----------------

-RET-------Return
		-----------------
Near -          |1|1|0|0|0|0|1|1|
		-----------------
		-----------------
Far (aka RETF)- |1|1|0|0|1|0|1|1|
		-----------------
		-----------------
Near, SP+= # -  |1|1|0|0|0|0|1|0|  16-bit displacement
		-----------------
		-----------------
Far, SP+= # -   |1|1|0|0|1|0|1|0|  16-bit displacement
		-----------------

-ROL-------Rotate Left
		-----------------  -----------------
R/M by 1 -      |1|1|0|1|0|0|0|w|  |mod|0|0|0| R/M |
		-----------------  -----------------
		-----------------  -----------------
R/M by CL -     |1|1|0|1|0|0|1|w|  |mod|0|0|0| R/M |
		-----------------  -----------------
		-----------------  -----------------
R/M by # -      |1|1|0|0|0|0|0|w|  |mod|0|0|0| R/M |  8-Bit number
		-----------------  -----------------

-ROR-------Rotate Right
		-----------------  -----------------
R/M by 1 -      |1|1|0|1|0|0|0|w|  |mod|0|0|1| R/M |
		-----------------  -----------------
		-----------------  -----------------
R/M by CL -     |1|1|0|1|0|0|1|w|  |mod|0|0|1| R/M |
		-----------------  -----------------
		-----------------  -----------------
R/M by # -      |1|1|0|0|0|0|0|w|  |mod|0|0|1| R/M |  8-Bit number
		-----------------  -----------------

-SAHF------Store AH to flags
-----------------
|1|0|0|1|1|1|1|0|
-----------------

-SAL-------Arithmetic Shift Left (same as SHL [thus not highly used])
		-----------------  -----------------
R/M by 1 -      |1|1|0|1|0|0|0|w|  |mod|1|0|0| R/M |
		-----------------  -----------------
		-----------------  -----------------
R/M by CL -     |1|1|0|1|0|0|1|w|  |mod|1|0|0| R/M |
		-----------------  -----------------
		-----------------  -----------------
R/M by # -      |1|1|0|0|0|0|0|w|  |mod|1|0|0| R/M |  8-Bit number
		-----------------  -----------------

-SAR-------Arithmetic Shift Right
		-----------------  -----------------
R/M by 1 -      |1|1|0|1|0|0|0|w|  |mod|1|1|1| R/M |
		-----------------  -----------------
		-----------------  -----------------
R/M by CL -     |1|1|0|1|0|0|1|w|  |mod|1|1|1| R/M |
		-----------------  -----------------
		-----------------  -----------------
R/M by # -      |1|1|0|0|0|0|0|w|  |mod|1|1|1| R/M |  8-Bit number
		-----------------  -----------------

-SBB-------Integer Subtract with Borrow
		-----------------  -----------------
Register/Memory |0|0|0|1|1|0|d|w|  |mod| reg | R/M |
		-----------------  -----------------
Immediate from  -----------------  -----------------
Register/Memory |1|0|0|0|0|0|s|w|  |mod|0|1|1| R/M |  -Data-
		-----------------  -----------------
Immediate from  -----------------
AL/AX/EAX Reg.  |0|0|0|1|1|1|0|w|  -Data-
		-----------------

-SCAS_-----Scan String data (SCASB, SCASW, SCASD)
-----------------
|1|0|1|0|1|1|1|w|
-----------------

-SET__-----Set byte on condition true
-----------------  -----------------  -----------------
|0|0|0|0|1|1|1|1|  |1|0|0|1| cond. |  |mod|0|0|0| R/M |
-----------------  -----------------  -----------------

-SGDT------Store Global Descriptor register
-----------------  -----------------  -----------------
|0|0|0|0|1|1|1|1|  |0|0|0|0|0|0|0|1|  |mod|0|0|0| R/M |
-----------------  -----------------  -----------------

-SHL-------Logical Shift Left
		-----------------  -----------------
R/M by 1 -      |1|1|0|1|0|0|0|w|  |mod|1|0|0| R/M |
		-----------------  -----------------
		-----------------  -----------------
R/M by CL -     |1|1|0|1|0|0|1|w|  |mod|1|0|0| R/M |
		-----------------  -----------------
		-----------------  -----------------
R/M by # -      |1|1|0|0|0|0|0|w|  |mod|1|0|0| R/M |  8-Bit number
		-----------------  -----------------

-SHR-------Logical Shift Right
		-----------------  -----------------
R/M by 1 -      |1|1|0|1|0|0|0|w|  |mod|1|0|1| R/M |
		-----------------  -----------------
		-----------------  -----------------
R/M by CL -     |1|1|0|1|0|0|1|w|  |mod|1|0|1| R/M |
		-----------------  -----------------
		-----------------  -----------------
R/M by # -      |1|1|0|0|0|0|0|w|  |mod|1|0|1| R/M |  8-Bit number
		-----------------  -----------------

-SHLD------Double precision Shift Left
		-----------------  -----------------  -----------------
R/M, # -        |0|0|0|0|1|1|1|1|  |1|0|1|0|0|1|0|0|  |mod| reg | R/M |  8-bit #
		-----------------  -----------------  -----------------
		-----------------  -----------------  -----------------
R/M, CL -       |0|0|0|0|1|1|1|1|  |1|0|1|0|0|1|0|1|  |mod| reg | R/M |
		-----------------  -----------------  -----------------

-SHRD------Double precision Shift Right
		-----------------  -----------------  -----------------
R/M, # -        |0|0|0|0|1|1|1|1|  |1|0|1|0|1|1|0|0|  |mod| reg | R/M |  8-bit #
		-----------------  -----------------  -----------------
		-----------------  -----------------  -----------------
R/M, CL -       |0|0|0|0|1|1|1|1|  |1|0|1|0|1|1|0|1|  |mod| reg | R/M |
		-----------------  -----------------  -----------------

-SIDT------Store Interrupt Descriptor Table register
-----------------  -----------------  -----------------
|0|0|0|0|1|1|1|1|  |0|0|0|0|0|0|0|1|  |mod|0|0|1| R/M |
-----------------  -----------------  -----------------

-SLDT------Store Local Descriptor Table register
-----------------  -----------------  -----------------
|0|0|0|0|1|1|1|1|  |0|0|0|0|0|0|0|0|  |mod|0|0|0| R/M |
-----------------  -----------------  -----------------

-SMSW------Store Machine Status Word register
-----------------  -----------------  -----------------
|0|0|0|0|1|1|1|1|  |0|0|0|0|0|0|0|1|  |mod|1|0|0| R/M |
-----------------  -----------------  -----------------

-STC-------Set Carry flag
-----------------
|1|1|1|1|1|0|0|1|
-----------------

-STD-------Set Direction flag
-----------------
|1|1|1|1|1|1|0|1|
-----------------

-STI-------Set Interrupt flag (enable interrupts)
-----------------
|1|1|1|1|1|0|1|1|
-----------------

-STOS_-----Store String Data (STOSB, STOSW, STOSD)
-----------------
|1|0|1|0|1|0|1|w|
-----------------

-STR-------Store Task register
-----------------  -----------------  -----------------
|0|0|0|0|1|1|1|1|  |0|0|0|0|0|0|0|0|  |mod|0|0|1| R/M |
-----------------  -----------------  -----------------

-SUB-------Integer Subtract
		-----------------  -----------------
Register/Memory |0|0|1|0|1|0|d|w|  |mod| reg | R/M |
		-----------------  -----------------
Immediate to    -----------------  -----------------
Register/Memory |1|0|0|0|0|0|s|w|  |mod|1|0|1| R/M |  -Data-
		-----------------  -----------------
Immediate to    -----------------
AL/AX/EAX Reg.  |0|0|1|0|1|1|0|w|  -Data-
		-----------------

-TEST------Test 
		-----------------  -----------------
R/M, reg -      |1|0|0|0|0|1|0|w|  |mod| reg | R/M |
		-----------------  -----------------
		-----------------  -----------------
R/M, # -        |1|1|1|1|0|1|1|w|  |mod|0|0|0| R/M |  -Data-
		-----------------  -----------------
Immediate to    -----------------
AL/AX/EAX Reg.  |1|0|1|0|1|0|0|w|  -Data-
		-----------------

-VERR------Verify a segment for Read
-----------------  -----------------  -----------------
|0|0|0|0|1|1|1|1|  |0|0|0|0|0|0|0|0|  |mod|1|0|0| R/M |
-----------------  -----------------  -----------------

-VERW------Verify a segment for Write
-----------------  -----------------  -----------------
|0|0|0|0|1|1|1|1|  |0|0|0|0|0|0|0|0|  |mod|1|0|1| R/M |
-----------------  -----------------  -----------------

-WAIT------Wait until busy pin is inactive
-----------------
|1|0|0|1|1|0|1|1|
-----------------

-XCHG------Exchange
		-----------------  -----------------
R/M, reg -      |1|0|0|0|0|1|1|w|  |mod| reg | R/M |
		-----------------  -----------------
Register with   -----------------
AX/EAX Reg.     |1|0|0|1|0| reg |
		-----------------

-XLATB-----Table look-up
-----------------
|1|1|0|1|0|1|1|1|
-----------------

-XOR-------Logical Exclusive OR
		-----------------  -----------------
Register/Memory |0|0|1|1|0|0|d|w|  |mod| reg | R/M |
		-----------------  -----------------
Immediate to    -----------------  -----------------
Register/Memory |1|0|0|0|0|0|s|w|  |mod|1|1|0| R/M |  -Data-
		-----------------  -----------------
Immediate to    -----------------
AL/AX/EAX Reg.  |0|0|1|1|0|1|0|w|  -Data-
		-----------------

---------------------------------------------------------------------
INSTRUCTION PREFIXES
~~~~~~~~~~~~~~~~~~~~

-----------Operand Size prefix
-----------------
|0|1|1|0|0|1|1|0|
-----------------
Changes 16-bit things to 32-bit in real mode
Changes 32-bit things to 16-bit in protected mode

-----------Address Size prefix
-----------------
|0|1|1|0|0|1|1|1|
-----------------
Changes 16-bit address (things in the []) to 32-bit in real mode
Changes 32-bit address (things in the []) to 16-bit in protected mode


-CS:-------CS Segment override
-----------------
|0|0|1|0|1|1|1|0|
-----------------

-DS:-------DS Segment override
-----------------
|0|0|1|1|1|1|1|0|
-----------------

-ES:-------ES Segment override
-----------------
|0|0|1|0|0|1|1|0|
-----------------

-FS:-------FS Segment override
-----------------
|0|1|1|0|0|1|0|0|
-----------------

-GS:-------GS Segment override
-----------------
|0|1|1|0|0|1|0|1|
-----------------

-SS:-------SS Segment override
-----------------
|0|0|1|1|0|1|1|0|
-----------------

-REP-------Repeat (until cx=0) (aka REPNZ)
-----------------
|1|1|1|1|0|0|1|0|
-----------------

-REPE------Repeat while Equal/Zero (REPZ)
-----------------
|1|1|1|1|0|0|1|1|
-----------------

-LOCK------assert bus Lock signal
-----------------
|1|1|1|1|0|0|0|0|
-----------------





---------------------------------------------------------------------
Bit meanings:

w - size bit.   0= byte sized operands (ah, bl, etc.)
		1= word sized operands (ax, bx, etc.) unless overrides
		   with "uses32" prefix, when they become 32-bit operands

d - direction bit.
		0= First operand(Destination) is in Mod R/M, second in Reg
		1= First operand(Destination) is in Reg, second in Mod R/M

Conditions (cond.):
	0000    Overflow (O)
	0001    Not Overflow (NO)
	0010    Below (B)/ Not Above or Equal (NAE)
	0011    Not Below (NB)/ Above or Equal (AE)
	0100    Eqaul (E)/ Zero (Z)
	0101    Not Equal (NE)/ Not Zero (NZ)
	0110    Below or Equal (BE)/ Not Above (NA)
	0111    Not Below or Equal (NBE)/ Above (A)
	1000    Sign (S)/ Negative
	1001    Not Sign (NS)/ Positive
	1010    Parity (P)/ Parity Even (PE)
	1011    Not Parity (NP)/ Parity Odd (PO)
	1100    Less (L)/ Not Greater or Equal (NGE)
	1101    Not Less (NL)/ Greater or Equal (GE)
	1110    Less or Equal (LE)/ Not Greater (NG)
	1111    Not Less or Equal (NLE)/ Greater (G)

SReg Field (also srg & xrg)
~~~~~~~~~~
	SReg  Description
	-----------------
	000 - es        -----
	001 - cs          |
	010 - ss         srg
	011 - ds        -----
	100 - fs        -----
	101 - gs          |
	110 - ?          xrg
	111 - ?         -----

Mod R/M Byte Layout - Real mode
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
-------------------------
|  |  |  |  |  |  |  |  |
-------------------------
Reg/SReg | MOD |   R/M
Operand1 | Operand 2

[Reg Field (real)]

Reg   Description
-----------------
000 - EAX/AX/AL
001 - ECX/CX/CL
010 - EDX/DX/DL
011 - EBX/BX/BL
100 - ESP/SP/AH
101 - EBP/BP/CH
110 - ESI/SI/DH
111 - EDI/DI/BH

[Mod R/M Fields (real)]

Mod R/M   Description
---------------------
 00 000 - DS:[BX+SI]
 00 001 - DS:[BX+DI]
 00 010 - SS:[BP+SI]
 00 011 - SS:[BP+DI]
 00 100 - DS:[SI]
 00 101 - DS:[DI]
 00 110 - DS:d16
 00 111 - DS:[BX]

 01 000 - DS:[BX+SI+d8]
 01 001 - DS:[BX+DI+d8]
 01 010 - SS:[BP+SI+d8]
 01 011 - SS:[BP+DI+d8]
 01 100 - DS:[SI+d8]
 01 101 - DS:[DI+d8]
 01 110 - DS:[BX+d8]
 01 111 - DS:[BP+d8]

 10 000 - DS:[BX+SI+d16]
 10 001 - DS:[BX+DI+d16]
 10 010 - SS:[BP+SI+d16]
 10 011 - SS:[BP+DI+d16]
 10 100 - DS:[SI+d16]
 10 101 - DS:[DI+d16]
 10 110 - DS:[BX+d16]
 10 111 - DS:[BP+d16]

 11 000 - EAX/AX/AL
 11 001 - ECX/CX/CL
 11 010 - EDX/DX/DL
 11 011 - EBX/BX/BL
 11 100 - ESP/SP/AH
 11 101 - EBP/BP/CH
 11 110 - ESI/SI/DH
 11 111 - EDI/DI/BH

d16 = 16-bit displacement
d8  = 8-bit displacement



Mod R/M Byte Layout - Protected mode
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
-------------------------       [  -------------------------  ]
|  |  |  |  |  |  |  |  |       [  |  |  |  |  |  |  |  |  |  ]
-------------------------       [  -------------------------  ]
Reg/SReg | MOD |   R/M                SS | Index  |  Base
Operand1 | Operand 2

[Reg Field (protected)]

Reg   Description
-----------------
000 - EAX/AX/AL
001 - ECX/CX/CL
010 - EDX/DX/DL
011 - EBX/BX/BL
100 - ESP/SP/AH
101 - EBP/BP/CH
110 - ESI/SI/DH
111 - EDI/DI/BH

[Mod R/M Fields (protected)]

Mod R/M   Description
---------------------
 00 000 - DS:[EAX]
 00 001 - DS:[ECX]
 00 010 - DS:[EDX]
 00 011 - DS:[EBX]
 00 101 - DS:[d32]
 00 110 - DS:[ESI]
 00 111 - DS:[EDI]

 01 000 - DS:[EAX + d8]
 01 001 - DS:[ECX + d8]
 01 010 - DS:[EDX + d8]
 01 011 - DS:[EBX + d8]
 01 101 - SS:[EBP + d8]
 01 110 - DS:[ESI + d8]
 01 111 - DS:[EDI + d8]

 10 000 - DS:[EAX + d32]
 10 001 - DS:[ECX + d32]
 10 010 - DS:[EDX + d32]
 10 011 - DS:[EBX + d32]
 10 101 - SS:[EBP + d32]
 10 110 - DS:[ESI + d32]
 10 111 - DS:[EDI + d32]

 11 000 - EAX/AX/AL
 11 001 - ECX/CX/CL
 11 010 - EDX/DX/DL
 11 011 - EBX/BX/BL
 11 101 - EBP/BP/CH
 11 110 - ESI/SI/DH
 11 111 - EDI/SI/BH

IF (R/M = 100) and (MOD != 11) then a second byte is added of the format
above (in the []).

MOD     SS      INDEX   BASE    Operand2 (Op1=reg)
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
00      ss      iii     000     DS:[EAX + (ss*iii)]
00      ss      iii     001     DS:[ECX + (ss*iii)]
00      ss      iii     010     DS:[EDX + (ss*iii)]
00      ss      iii     011     DS:[EBX + (ss*iii)]
00      ss      iii     100     SS:[ESP + (ss*iii)]
00      ss      iii     101     DS:[d32 + (ss*iii)]
00      ss      iii     110     DS:[ESI + (ss*iii)]
00      ss      iii     111     DS:[EDI + (ss*iii)]

01      ss      iii     000     DS:[EAX + (ss*iii) + d8]
01      ss      iii     001     DS:[ECX + (ss*iii) + d8]
01      ss      iii     010     DS:[EDX + (ss*iii) + d8]
01      ss      iii     011     DS:[EBX + (ss*iii) + d8]
01      ss      iii     100     SS:[ESP + (ss*iii) + d8]
01      ss      iii     101     SS:[EBP + (ss*iii) + d8]
01      ss      iii     110     DS:[ESI + (ss*iii) + d8]
01      ss      iii     111     DS:[EDI + (ss*iii) + d8]

10      ss      iii     000     DS:[EAX + (ss*iii) + d32]
10      ss      iii     001     DS:[ECX + (ss*iii) + d32]
10      ss      iii     010     DS:[EDX + (ss*iii) + d32]
10      ss      iii     011     DS:[EBX + (ss*iii) + d32]
10      ss      iii     100     SS:[ESP + (ss*iii) + d32]
10      ss      iii     101     SS:[EBP + (ss*iii) + d32]
10      ss      iii     110     DS:[ESI + (ss*iii) + d32]
10      ss      iii     111     DS:[EDI + (ss*iii) + d32]

iii (index)
~~~~~~~~~~~
000 EAX
001 ECX
010 EDX
011 EBX
100 no index
101 EBP
110 ESI
111 EDI

ss (scale factor)
~~~~~~~~~~~~~~~~~
00  *1
01  *2
10  *4
11  *8


d32 = 32-bit displacement
d16 = 16-bit displacement
d8  = 8-bit displacement


Compiled by Cyclone.  mailto:imoravec@julian.uwo.ca
Questions/Comments/Corrections?  mail me.
