//
//	et4000.pmi - SVPMI File for ET4000 chip set based VGA adapters
//                 (e.g. CARDINAL VGA732 )
//
//		800x600 - 16		graphics
//		80x25				text
//
// Entered by: Luc Bazinet (June 3, 1992)
// Updated:   (July 24, 1992)
//

[VERSION]
	1.0;

[ACTIVE_ADAPTER]
	VGA;

[TEXT_MODE]
	3;

[GRAPHICS_MODE]
	0x29;

[ADAPTER]
	VGA;

[ADAPTERTYPE]
	TSENG

[CHIPSET]
	ET4000

//
// 800x600 - 16 colour
//
[MODE]
	0x29;

[MODEINFO]
	ModeAttributes		= 0xA18;
	WinAAttributes		= 0;
	WinBAttributes		= 0;
	WinAGranularity		= 0;
	WinASize		= 64;
	WinABase		= 0xA0000;
	BytesPerScanLine	= 100;
	XResolution		= 800;
	YResolution		= 600;
	XCharSize		= 0;
	YCharSize		= 0;
	ColorModel		= 1;
	BitsPerPixel		= 4;
	NumberOfColors		= 16;
	BitsRGB			= 6;
	NumberOfBanks		= 1;
	BankSize		= 0;
	MemoryModel		= 0x3;
	ImagePages		= 1;

[ADDRESSES]
	MEMORY(0xA0000 - 0xAFFFF);
	PORT(0x3D4, 0x3D5);						// for CRTC regs
	PORT(0x3C4, 0x3C5);						// for SEQ regs
	PORT(0x3C2);							// Misc Output reg
	PORT(0x3DA);							// Attribute Controller
	PORT(0x3C0);							// Palette Enable
	PORT(0x3C1);
	PORT(0x3CE, 0x3CF);						// Graphics Controller regs


[MODEDETECT]
	r0 = 1;

[LOCK]
//
//	Lock Extended Registers
//

	outb(0x3bf, 0x01);
	outb(0x3d8, 0x29);

[UNLOCK]
//
//	Unlock Extended Registers
//

	outb(0x3bf, 0x03);
	outb(0x3d8, 0xa0);

[SETMODE]

//
//	Set Miscellaneous Output Register
//

	outb(0x3c2, 0xef);

//
//	Unlock Extended Registers
//

	outb(0x3bf, 0x03);
	outb(0x3d8, 0xa0);
	outb(0x3cd, 0x00);
	
//
//	Set Sequencer Registers
//

	r0   = 0x03; r1   = 0x01; r2   = 0x0f; r3   = 0x00; r4   = 0x06;
	boutb(5, 0x00, 0x3c4, 0x3c5);

	r6   = 0x00; r7   = 0xfc; 
	boutb(2, 0x06, 0x3c4, 0x3c5);

//
//	Set CRT Registers
//

	r17 = 0x0e;
	boutb(1, 17, 0x3d4, 0x3d5);
	r0   = 0x7a; r1   = 0x63; r2   = 0x64; r3   = 0x9d; r4   = 0x68;
	r5   = 0x9a; r6   = 0x78; r7   = 0xf0; r8   = 0x00; r9   = 0x60;
	r10  = 0x00; r11  = 0x00; r12  = 0x00; r13  = 0x00; r14  = 0x00;
	r15  = 0x00; r16  = 0x5c; r17  = 0x8e; r18  = 0x57; r19  = 0x32;
	r20  = 0x00; r21  = 0x5b; r22  = 0x75; r23  = 0xc3; r24  = 0xff;
	boutb(25, 0x00, 0x3d4, 0x3d5);

	r52  = 0x08; r53  = 0x00; 
	boutb(2, 0x34, 0x3d4, 0x3d5);

//
//	Set Attribute Registers
//

	inb(r63, 0x3DA);					// reset flip/flop
	r0   = 0x00; r1   = 0x01; r2   = 0x02; r3   = 0x03; r4   = 0x04;
	r5   = 0x05; r6   = 0x14; r7   = 0x07; r8   = 0x38; r9   = 0x39;
	r10  = 0x3a; r11  = 0x3b; r12  = 0x3c; r13  = 0x3d; r14  = 0x3e;
	r15  = 0x3f; r16  = 0x01; r17  = 0x00; r18  = 0x0f; r19  = 0x00;
	r20  = 0x00; 
	boutb(20, 0x00, 0x3c0, 0x3c0);
	outb( 0x3C0, 0x20 );				// enable palette

	r22  = 0x00; 
	boutb(1, 0x16, 0x3c0, 0x3c1);

//
//	Set GDC Registers
//

	r0   = 0x00; r1   = 0x00; r2   = 0x00; r3   = 0x00; r4   = 0x00;
	r5   = 0x00; r6   = 0x05; r7   = 0x0f; r8   = 0xff; 
	boutb(9, 0x00, 0x3ce, 0x3cf);

//
// Text mode
//
[MODE]
	3;

[MODEINFO]
	ModeAttributes		= 0x8;
	WinAAttributes		= 0;
	WinAGranularity		= 0;
	WinASize			= 8;
	WinABase			= 0xb8000;
	BytesPerScanLine	= 80;
	XResolution			= 80;
	YResolution			= 25;
	XCharSize			= 9;
	YCharSize			= 16;
	ColorModel			= 3;
	BitsPerPixel		= 4;
	NumberOfColors		= 16;
	BitsRGB				= 6;
	NumberOfBanks		= 1;
	BankSize			= 0;
	MemoryModel			= 0;
	ImagePages			= 1;

[ADDRESSES]
	MEMORY(0xB8000 - 0xBFFFF);
	PORT(0x3D4, 0x3D5);						// for CRTC regs
	PORT(0x3C4, 0x3C5);						// for SEQ regs
	PORT(0x3C2);							// Misc Output reg
	PORT(0x3DA);							// Attribute Controller
	PORT(0x3C0);							// Palette Enable
	PORT(0x3CE, 0x3CF);						// Graphics Controller regs

[MODEDETECT]
	r0 = 1;

[SETMODE]

	outb(0x3bf, 0x03);						// Unlock Extended Registers.
	outb(0x3d8, 0xa0);

	rmwb(0x3c4, 0x3c5, 0x07, 0x00, 0xfc);
	rmwb(0x3d4, 0x3d5, 0x34, 0x00, 0x08);
	rmwb(0x3d4, 0x3d5, 0x35, 0x00, 0x00);

	outb(0x3bf, 0x01);					// Lock Extended Registers.
	outb(0x3d8, 0x29);

	inb(r63, 0x3DA);						// reset attr F/F
	outb(0x3C0, 0);							// disable palette
	outb(0x3D4, 0x11);	outb(0x3D5, 0);		// unprotect crtc regs 0-7

	// Reset and set sequencer regs

	r0 = 0x01;	r1 = 0x00;	r2 = 0x03;	r3 = 0x00;
	r4 = 0x02;
	boutb(5, 0x3C4, 0x3C5);					// reset, seq regs

	// set misc out reg

	outb(0x3C2, 0x63);

	r0 = 0x03;
	boutb(1, 0x3C4, 0x3C5);					// sequencer enable

	// set all crtc regs

	r0 = 0x5F;	r1 = 0x4F;	r2 = 0x50;	r3 = 0x82;
	r4 = 0x55;	r5 = 0x81;	r6 = 0xBF;	r7 = 0x1F;
	r8 = 0x00;	r9 = 0xC7;	r10= 0x06;	r11= 0x07;
	r12= 0x00;	r13= 0x00;	r14= 0x00;	r15= 0x59;
	r16= 0x9C;	r17= 0x8E;	r18= 0x8F;	r19= 0x28;
	r20= 0x1F;	r21= 0x96;	r22= 0xB9;	r23= 0xA3;
	r24= 0xFF;
	boutb(25, 0x3D4, 0x3D5);

	// set all graphics controller regs

	outb( 0x3CC, 0);	outb( 0x3CA, 1);

	r0 = 0x00;	r1 = 0x00;	r2 = 0x00;	r3 = 0x00;
	r4 = 0x00;	r5 = 0x10;	r6 = 0x0E;	r7 = 0x00;
	r8 = 0xFF;
	boutb(9, 0x3CE, 0x3CF);

	// set all attribute regs

	inb(r63, 0x3DA);						// reset flip/flop
	r0 = 0x00;	r1 = 0x01;	r2 = 0x02;	r3 = 0x03;
	r4 = 0x04;	r5 = 0x05;	r6 = 0x14;	r7 = 0x07;
	r8 = 0x38;	r9 = 0x39;	r10= 0x3A;	r11= 0x3B;
	r12= 0x3C;	r13= 0x3D;	r14= 0x3E;	r15= 0x3F;
	r16= 0x0C;	r17= 0x00;	r18= 0x0F;	r19= 0x08;
	r20= 0x00;
	boutb(21, 0x3C0, 0x3C0);

	outb( 0x3C0, 0x20 );					// enable palette